Voltage-controlled-current-source-only verilog-a resistor model for R⩾0

@article{Lemaitre2008Voltagecontrolledcurrentsourceonl,
  title={Voltage-controlled-current-source-only verilog-a resistor model for R⩾0},
  author={Laurent Lemaitre and Colin C. McAndrew},
  journal={2008 IEEE International Behavioral Modeling and Simulation Workshop},
  year={2008},
  pages={93-95}
}
Conventionally, implementation in circuit simulators of resistor models that can support zero or small-valued resistances is done by changing the model formulation from I = V/R, which is preferred for nodal analysis but cannot be used for R = 0, to V = IR for small values of resistance, or by "collapsing" the nodes between which the resistor is connected for R = 0. For compact model implementation purposes, in simulators based on the modified nodal formulation it is more convenient to have… CONTINUE READING