Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip

@article{Ogras2007VoltageFrequencyIP,
  title={Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip},
  author={{\"U}mit Y. Ogras and Radu Marculescu and Puru Choudhary and Diana Marculescu},
  journal={2007 44th ACM/IEEE Design Automation Conference},
  year={2007},
  pages={110-115}
}
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single global clock signal throughout a chip have become major design bottlenecks. To deal with these issues, a globally asynchronous, locally synchronous (GALS) design is considered for achieving low power consumption and modular design. Such a design style fits nicely with the concept of voltage-frequency islands (VFIs) which… CONTINUE READING

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