Very low power pipelines using significance compression

@article{Canal2000VeryLP,
  title={Very low power pipelines using significance compression},
  author={Rosell{\'o} Canal and Alberto Almanza Gonz{\'a}lez and Jessica Smith},
  journal={Proceedings 33rd Annual IEEE/ACM International Symposium on Microarchitecture. MICRO-33 2000},
  year={2000},
  pages={181-190}
}
Data, addresses, and instructions are compressed by maintaining only significant bytes with two or three extension bits appended to indicate the significant byte positions. This significance compression method is integrated into a 5-stage pipeline, with the extension bits flowing down the pipeline to enable pipeline operations only for the significant bytes. Consequently, register logic and cache activity (and dynamic power) are substantially reduced. An initial trace-driven study shows… CONTINUE READING

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