Verifying a self-timed divider

@article{OnoTesfaye1998VerifyingAS,
  title={Verifying a self-timed divider},
  author={Tarik Ono-Tesfaye and Christoph Kern and Mark R. Greenstreet},
  journal={Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems},
  year={1998},
  pages={146-158}
}
This paper presents an approach to verifying timed designs based on refinement: first, correctness is established for a speed-independent model; then, the timed design is shown to be a refinement of this model. Although this approach is less automatic than methods based on timed state space enumeration, it is tractable for larger designs. Our method is implemented using a proof checker with a built-in model checker for verifying properties of high-level models, a tautology checker for… CONTINUE READING

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