Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator

  title={Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator},
  author={Aharon Aharon and Ayal Bar-David and Barry Dorfman and Emanuel Gofman and Moshe Leibowitz and Victor Schwartzburd},
  journal={IBM Systems Journal},
Verification of a computer that implements a new architecture is especially difficult since no approved functional test cases are available. The logic design of the ISM RlSC System/SOOO" was verified mainly by a special1 developed random test program generator (RT PY G), which was used from the early stages of the design until its successful completion. APL was chosen for the RlSC System/SOOO RTPG implementation after considering the suitability of this programming language for modelin computer… CONTINUE READING
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