Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator

@article{Aharon1991VerificationOT,
  title={Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator},
  author={Aharon Aharon and Ayal Bar-David and Barry Dorfman and Emanuel Gofman and Moshe Leibowitz and Victor Schwartzburd},
  journal={IBM Syst. J.},
  year={1991},
  volume={30},
  pages={527-538}
}
  • Aharon Aharon, Ayal Bar-David, +3 authors Victor Schwartzburd
  • Published 1991
  • Computer Science
  • IBM Syst. J.
  • Verification of a computer that implements a new architecture is especially difficult since no approved functional test cases are available. The logic design of the IBM RISC System/6000™ was verified mainly by a specially developed random test program operator (RTPG), which was used from the early stages of the design until its successful completion. APL was chosen for the RISC System/6000 RTPG implementation after considering the suitability of this programming language for modeling computer… CONTINUE READING

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