Verification Components Reuse

@article{Sagahyroon2012VerificationCR,
  title={Verification Components Reuse},
  author={Assim Sagahyroon and Geetha Lakkaraj and Maddu Karunaratne},
  journal={JCP},
  year={2012},
  volume={7},
  pages={2641-2649}
}
Design verification of ASICs is often approached in an ad-hoc manner without the care, planning and scrutiny that usually accompanies a typical design effort. As the complexity of ASIC design increases, it is expected that the complexity of verification environments of such designs will increase as well. To reduce development time and effort, design reuse… CONTINUE READING