Vector Processing on Scalar Architectures

  title={Vector Processing on Scalar Architectures},
  author={Micah Beck and Antonio Castellanos},
A 64-bit processor must necessarily implement substantial parallelism in the movement and processing of data. Data movement is inherently parallel at the bit level, and many operations implemented in the integer unit exhibit bit-level parallelism. A microvector is an array of small data items or bit elds packed into a single word. Scalar operations performed on a microvector can be used to implement vector parallelism on its constituent elds. In this paper we present libuvec, a library for… CONTINUE READING
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