Variability Induced by Line Edge Roughness in Double-Gate Dopant-Segregated Schottky MOSFETs


Intrinsic parameter fluctuations introduced by process variations, such as line edge roughness (LER), create an increasing challenge to the CMOS technology scaling. In this paper, variations in double-gate dopant-segregate Schottky (DSS) MOSFETs, caused by LER of silicon-fin, are systematically investigated using statistical technology computer-aided design… (More)

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