VLSI implementation of a hardware-optimized lattice reduction algorithm for WiMAX/LTE MIMO detection

@article{Youssef2010VLSIIO,
  title={VLSI implementation of a hardware-optimized lattice reduction algorithm for WiMAX/LTE MIMO detection},
  author={Ameer Youssef and Mahdi Shabany and P. Glenn Gulak},
  journal={Proceedings of 2010 IEEE International Symposium on Circuits and Systems},
  year={2010},
  pages={3541-3544}
}
This paper presents the first ASIC implementation of an LR algorithm which achieves ML diversity. The VLSI implementation is based on a novel hardware-optimized LLL algorithm that has 70% lower complexity than the traditional complex LLL algorithm. This reduction is achieved by replacing all the computationally intensive CLLL operations (multiplication… CONTINUE READING