VLSI Design of a RSA Encryption / Decryption Chip using Systolic Array based Architecture

Abstract

VLSI Design of a RSA Encryption/Decryption Chip using Systolic Array based Architecture Chi-Chia Sun, Bor-Shing Lin, Gene Eu Jan & Jheng-Yi Lin To cite this article: Chi-Chia Sun, Bor-Shing Lin, Gene Eu Jan & Jheng-Yi Lin (2016): VLSI Design of a RSA Encryption/Decryption Chip using Systolic Array based Architecture, International Journal of Electronics… (More)

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