• Corpus ID: 3160070

VLSI Design and Implementation of Low Power MAC Unit with Block Enabling Technique

@inproceedings{Shanthala2009VLSIDA,
  title={VLSI Design and Implementation of Low Power MAC Unit with Block Enabling Technique},
  author={S. Shanthala and S. Y. Kulkarni},
  year={2009}
}
In the majority of digital signal processing (DSP) applications the critical operations are the multiplication and accumulation. Real-time signal processing requires high speed and high throughput Multiplier-Accumulator (MAC) unit that consumes low power, which is always a key to achieve a high performance digital signal processing system. The purpose of this work is, design and implementation of a low power MAC unit with block enabling technique to save power. Firstly, a 1-bit MAC unit is… 

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