VLSI Architecture of 1.264 Block Size Decision based on Rate-Distortion Optimization


A novel approach to hardware implementation of H.264 block size decision is proposed, which is based on rate-distortion (RD) optimization. Utilization of RD cost for block size decision can improve up to 2.0 dB of PSNR in compared with conventional SAD/SATD based approaches. However, calculation of RD cost for a block incurs considerable computational costs… (More)


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