• Corpus ID: 59722678

VHDL For Designers

  title={VHDL For Designers},
  author={Stefan Sjoholm and Lennart Lindh},
From the Publisher: A practical guide to help electronics designers and students make the most of VHDL with the latest, most widely-used design tools available.This book presents both the professional and academic side of designing with VHDL, and shows how to take full advantage of VHDL with today's design tools. It contains many worked examples developed with Synopsys, Mentor Graphics and ViewLook tools. It reviews concurrent, sequential and structural VHDL, RAM and ROM development, state… 

Observability in Multiprocessor Real-Time Systems with Hardware / Software Co-Simulation

The key concepts with co-Simulation as adopted in two leading commercial tools are presented and the use of co-simulation for verification of a real-time system is discussed.

A Design and Implementation of High Speed Routing Chips Using FPGA

This paper describes the design and development of routing chips used in a proprietary high-speed network switch called HSSI, and finds that using VHDL along with the FPGA technology provides a fast development environment that can reduced the design effort tremendously.

Study on micro controller design and verification methodology

  • Kyoung-soo KimJusung Park
  • Computer Science
    7th Korea-Russia International Symposium on Science and Technology, Proceedings KORUS 2003. (IEEE Cat. No.03EX737)
  • 2003
The design and verification methodology of 16 bits microcontroller is introduced, which is compatible with 8 bits micro controller, 8051, widely used in the industrial fields these days and can be operated more powerfully than8051.

Verification of Embedded Real-Time Systems Using Hardware/Software Cosimulation

The use of a co-simulation tool for verification of embedded real-time systems and its suitability in the development of real- time systems is discussed.

FPGA implementation of a digital IQ demodulator using VHDL

A DSP-based algorithm representing the demodulator was described in behavioural VHDL, which was used for simulation at the functional level and the final implementation was carried out in FPGA devices.

Improving a fixed-point RISC processor by a hybrid adder

A previously designed RISC processor is improved by finding one of the longer paths which was located in ALU, a substituting the adder of ALU by a high–speed hybrid adder and synthesizing of the processor shows results which are 45.6% better than before.

A hardware and software monitor for high-level system-on-chip verification

  • Mohammed El ShobakiL. Lindh
  • Computer Science
    Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design
  • 2001
MAMon is presented, a monitoring system that can both monitor the logic-level and the system-level in single/multiprocessor SoCs and can be achieved non-instrusively by using a hardware-based real-time kernel.

PD-XML: extensible markup language for processor description

This paper shows how PD-XML specifications can be translated into appropriate machine descriptions for the parametric HPL-PD VLIW processor, and for the Flexible Instruction Processor (FIP) approach targeting reconfigurable implementations.

VHDL-based modeling of a DC-DC boost converter

  • R. MitaG. Palumbo
  • Engineering
    2005 12th IEEE International Conference on Electronics, Circuits and Systems
  • 2005
The proposed VHDL modeling can be used to simulate complex digital circuits which includes a few of analog parts (e.g., memory banks or DSP core) by adopting an event-driven standard simulator and avoiding using common transistor-level simulators which dramatically increase the verification time.