VAR-TX: A variability-aware SRAM model for predicting the optimum architecture to achieve minimum access-time for yield enhancement in nano-scaled CMOS

Abstract

In this paper we propose a new hybrid analytical-empirical model, called VAR-TX, that exhaustively computes and compares all feasible architectures subject to inter-die (DID) and intra-die (WID) process variations (PV). Based on its computation, VAR-TX predicts the optimal architecture that provides minimum access-time and minimum access-time variation for… (More)
DOI: 10.1109/ISQED.2012.6187541

Topics

8 Figures and Tables

Cite this paper

@article{SamandariRad2012VARTXAV, title={VAR-TX: A variability-aware SRAM model for predicting the optimum architecture to achieve minimum access-time for yield enhancement in nano-scaled CMOS}, author={Jeren Samandari-Rad and Matthew R. Guthaus and Richard Hughey}, journal={Thirteenth International Symposium on Quality Electronic Design (ISQED)}, year={2012}, pages={506-515} }