Using dynamic reconfiguration to implement high-resolution programmable delays on an FPGA

@article{Bergeron2008UsingDR,
  title={Using dynamic reconfiguration to implement high-resolution programmable delays on an FPGA},
  author={Etienne Bergeron and Mike Feeley and M.-A. Daigneault and J Pippin David},
  journal={2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference},
  year={2008},
  pages={265-268}
}
A digital circuit can be viewed as a network of transistors switching between low and high voltages. These transistors and the wires interconnecting them cause delays in signal propagation. In most cases, designers aim to minimize the delays in order to increase processing speed. Nevertheless, some applications such as delay lines, time to digital converters, asynchronous logic and others require the ability to precisely control a delay between two points in a circuit. This paper proposes a… CONTINUE READING

Citations

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