Using Multiple Block Buffers and Bit Line Isolation for Low Power Superscalar Processor Caches*

Abstract

On–chip caches in high end superscalar microprocessors dissipate a large fraction of the total power due to high density of transistors and high operating frequency. Organizational techniques such as block buffering and subbanking have been observed to provide substantial energy savings in a technology independent manner. We propose and evaluate the… (More)

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Cite this paper

@inproceedings{Kamble2007UsingMB, title={Using Multiple Block Buffers and Bit Line Isolation for Low Power Superscalar Processor Caches*}, author={Milind B. Kamble{\"I} and Kanad Ghose}, year={2007} }