Using Formal Verification/Analysis Methods on the Critical Path in System Design: A Case Study

@inproceedings{Eirksson1995UsingFV,
  title={Using Formal Verification/Analysis Methods on the Critical Path in System Design: A Case Study},
  author={{\'A}sgeir Th. Eir{\'i}ksson and Kenneth L. McMillan},
  booktitle={CAV},
  year={1995}
}
We present a case study of the use of formal verification methods in a computer system design project. The SMV model checker was integrated into the project design flow, and used to verify a specification of a cache coherency protocol for a distributed shared memory machine. Both the processor and I/O portions of the protocol description were verified… CONTINUE READING

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