• DOI:10.1109/IPDPSW.2013.207
• Corpus ID: 6784699

Use of SIMD Vector Operations to Accelerate Application Code Performance on Low-Powered ARM and Intel Platforms

@article{Mitra2013UseOS,
  title={Use of SIMD Vector Operations to Accelerate Application Code Performance on Low-Powered ARM and Intel Platforms},
  author={Gaurav Mitra and Beau Johnston and Alistair P. Rendell and Eric C. McCreath and J. Zhou},
  journal={2013 IEEE International Symposium on Parallel \& Distributed Processing, Workshops and Phd Forum},
  year={2013},
  pages={1107-1116}
}

• Gaurav Mitra, Beau Johnston, +2 authors J. Zhou
• Published 1 May 2013
• Computer Science
• 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum

Augmenting a processor with special hardware that is able to apply a Single Instruction to Multiple Data(SIMD) at the same time is a cost effective way of improving processor performance. It also offers a means of improving the ratio of processor performance to power usage due to reduced and more effective data movement and intrinsically lower instruction counts. This paper considers and compares the NEON SIMD instruction set used on the ARM Cortex-A series of RISC processors with the SSE2 SIMD instruction set found on Intel platforms within the context of the Open Computer Vision (OpenCV) library. The performance obtained using compiler auto-vectorization is compared with that achieved using hand-tuning across a range of five different benchmarks and ten different hardware platforms. On the ARM platforms the hand-tuned NEON benchmarks were between 1.05× and 13.88× faster than the auto-vectorized code, while for the Intel platforms the hand-tuned SSE benchmarks were between 1.34× and 5.54× faster.