Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache

@article{Jevdjic2014UnisonCA,
  title={Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache},
  author={Djordje Jevdjic and Gabriel H. Loh and Cansu Kaynak and Babak Falsafi},
  journal={2014 47th Annual IEEE/ACM International Symposium on Microarchitecture},
  year={2014},
  pages={25-37}
}
Recent research advocates large die-stacked DRAM caches in many core servers to break the memory latency and bandwidth wall. To realize their full potential, die-stacked DRAM caches necessitate low lookup latencies, high hit rates and the efficient use of off-chip bandwidth. Today's stacked DRAM cache designs fall into two categories based on the granularity at which they manage data: block-based and page-based. The state-of-the-art block-based design, called Alloy Cache, collocates a tag with… CONTINUE READING
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