Unified Gated Flip-Flops for Reducing the Clocking Power in Register Circuits

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@inproceedings{Okuhira2011UnifiedGF, title={Unified Gated Flip-Flops for Reducing the Clocking Power in Register Circuits}, author={Takumi Okuhira and Tohru Ishihara}, booktitle={PATMOS}, year={2011} }