Understanding the suppressed charge trapping in relaxed- and strained-Ge/SiO2/HfO2 pMOSFETs and implications for the screening of alternative high-mobility substrate/dielectric CMOS gate stacks

@article{Franco2013UnderstandingTS,
  title={Understanding the suppressed charge trapping in relaxed- and strained-Ge/SiO2/HfO2 pMOSFETs and implications for the screening of alternative high-mobility substrate/dielectric CMOS gate stacks},
  author={Jacopo Franco and Ben Kaczer and Ph. J. Roussel and J{\'e}r{\^o}me Mitard and S. Sioncke and Liesbeth Witters and Hans Mertens and Tibor Grasser and Guido Groeseneken},
  journal={2013 IEEE International Electron Devices Meeting},
  year={2013},
  pages={15.2.1-15.2.4}
}
We study charge trapping in a variety of Ge-based pMOS and nMOS technologies, either with Si passivation and conventional SiO2/HfO2 gate stack, or with GeOx/high-k gate stacks. A general model for understanding this phenomenon in alternative substrate/dielectric systems is proposed. We discuss two different approaches to pursue a reduction of charge trapping in alternative material systems, which will be necessary for achieving reliable high-mobility devices. 
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