Ultra-high density 3D SRAM cell designs for monolithic 3D integration


This paper presents design options for 3D SRAM cells to enable ultra-high density 3D SRAM based on monolithic 3D integration. Our target technology offers one tier of NMOS devices, another for PMOS devices, and nano-scale inter-tier vias. Choosing the most compact 22nm 2D SRAM as our design baseline, we first achieve a 33% footprint area reduction by simply… (More)


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@article{Liu2012UltrahighD3, title={Ultra-high density 3D SRAM cell designs for monolithic 3D integration}, author={Chang Liu and Sung Kyu Lim}, journal={2012 IEEE International Interconnect Technology Conference}, year={2012}, pages={1-3} }