Two-stage thermal-aware scheduling of task graphs on 3D multi-cores exploiting application and architecture characteristics

Abstract

In this paper, we propose a two-stage thermal-aware task scheduling policy which exploits the application and system architecture characteristics to decouple the mapping of task-graphs for the performance and peak temperature optimization into two stages. At the first stage, the algorithm collects the best mapping of task-graphs exploiting the application and architecture characteristics to minimize the makespan of the task-graphs. At the second stage, a light-weight online algorithm comprised of efficient thermal rank and combined power models is performed to map the task nodes to the real cores for temperature minimization while maintaining the best possible performance achieved in the first stage. Compared to the previous approaches which perform the performance and temperature optimization together, our method can reduce the online mapping algorithm complexity and improve its efficiency. Experiments on real benchmarks show that an average of 6.3°C peak temperature reduction and 6.8% performance improvement can be achieved compared to other existing methods.

DOI: 10.1109/ASPDAC.2017.7858343

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Cite this paper

@article{Zhu2017TwostageTS, title={Two-stage thermal-aware scheduling of task graphs on 3D multi-cores exploiting application and architecture characteristics}, author={Zuomin Zhu and Vivek Chaturvedi and Amit Kumar Singh and Wei Zhang and Yingnan Cui}, journal={2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)}, year={2017}, pages={324-329} }