Two new low-power Full Adders based on majority-not gates

Abstract

Two novel low-power 1-bit Full Adder cells are proposed in this paper. Both of them are based on majority-not gates, which are designed with new methods in each cell. The first cell is only composed of input capacitors and CMOS inverters, and the second one also takes advantage of a high-performance CMOS bridge circuit. These kinds of designs enjoy low… (More)
DOI: 10.1016/j.mejo.2008.08.020

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