Tuning and Optimization for a Variety of Many-Core Architectures Without Changing a Single Line of Implementation Code Using the Alpaka Library

@article{Matthes2017TuningAO,
  title={Tuning and Optimization for a Variety of Many-Core Architectures Without Changing a Single Line of Implementation Code Using the Alpaka Library},
  author={Alexander Matthes and Ren{\'e} Widera and Erik Zenker and Benjamin Worpitz and Axel Huebl and Michael Bussmann},
  journal={ArXiv},
  year={2017},
  volume={abs/1706.10086}
}
We present an analysis on optimizing performance of a single C++11 source code using the Alpaka hardware abstraction library. For this we use the general matrix multiplication (GEMM) algorithm in order to show that compilers can optimize Alpaka code effectively when tuning key parameters of the algorithm. We do not intend to rival existing, highly optimized DGEMM versions, but merely choose this example to prove that Alpaka allows for platform-specific tuning with a single source code. In… 
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References

SHOWING 1-10 OF 21 REFERENCES
Alpaka -- An Abstraction Library for Parallel Kernel Acceleration
TLDR
The Alpaka library defines and implements an abstract hierarchical redundant parallelism model that allows to achieve platform and performance portability across various types of accelerators by ignoring specific unsupported levels and utilizing only the ones supported on a specific accelerator.
Performance-Portable Many-Core Plasma Simulations: Porting PIConGPU to OpenPower and Beyond
TLDR
This work demonstrates how the CUDA-based open-source plasma simulation code PIConGPU can benefit from the tunable kernel execution strategies of the Alpaka library, achieving portability and performance with single-source kernels on conventional CPUs, Power8 CPUs and NVIDIA GPUs.
Kokkos: Enabling Performance Portability Across Manycore Architectures
TLDR
The Kokkos C++ library is developed to provide scientific and engineering codes with a user accessible many core performance portable programming model and enables users' code to satisfy multiple architecture specific memory access pattern performance constraints without having to modify their source code.
An optimized large-scale hybrid DGEMM design for CPUs and ATI GPUs
TLDR
This paper investigates advanced software-pipelining optimizations for the double-precision general matrix multiplication (DGEMM) algorithm running on a heterogeneous system that includes ATI GPUs and results show that resource contention on the PCIe bus and on the host memory are limiting factors.
OpenMP: an industry standard API for shared-memory programming
At its most elemental level, OpenMP is a set of compiler directives and callable runtime library routines that extend Fortran (and separately, C and C++ to express shared memory parallelism. It
Intel Xeon Phi Processor High Performance Programming: Knights Landing Edition 2nd Edition
This book is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights
The OpenCL specification
  • A. Munshi
  • Computer Science
    2009 IEEE Hot Chips 21 Symposium (HCS)
  • 2009
TLDR
The specification is divided into a core specification that any OpenCL compliant implementation must support; a handheld/embedded profile which relaxes the OpenCL compliance requirements for handheld and embedded devices; and a set of optional extensions that are likely to move into the core specification in later revisions of the Opencl specification.
PIConGPU: A Fully Relativistic Particle-in-Cell Code for a GPU Cluster
TLDR
The simulation code PIConGPU presented in this paper is, to the authors' knowledge, the first scalable GPU cluster implementation of the PIC algorithm in plasma physics.
Radiative signature of the relativistic Kelvin-Helmholtz Instability
  • M. Bussmann, H. Burau, R. Widera
  • Physics
    2013 SC - International Conference for High Performance Computing, Networking, Storage and Analysis (SC)
  • 2013
We present a particle-in-cell simulation of the relativistic Kelvin-Helmholtz Instability (KHI) that for the first time delivers angularly resolved radiation spectra of the particle dynamics during
...
...