Truncation error analysis of MTBF computation for multi-latch synchronizers

  title={Truncation error analysis of MTBF computation for multi-latch synchronizers},
  author={Terrence S. T. Mak},
  journal={Microelectronics Journal},
Chip designs have an increasing number of independent clock domains. Synchroniser circuits are used to facilitate reliable data transfers between these clock domains. The task of these synchronisers is inherently prone to the occasional, statistically random, failure. These failures are frequently quantified by the synchronisers’ Mean Time Between Failures, MTBF. The MTBF becomes worse at an exponential rate with increasing frequency. In contrast, the MTBF improves exponentially as more latches… CONTINUE READING
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