Trapping and detrapping mechanism in hafnium based dielectrics characterized by pulse gate voltage techniques [CMOS transistors]


A very efficient trapping has already been reported on transistors with Hf-based gate oxides. The authors have attributed these phenomena to the presence of electron traps at the HfO/sub 2//SiO/sub 2/, interface or in the HfO/sub 2/ bulk. More recent experimental results show that the trapping occurs in the bulk of the high-k dielectrics rather than at the… (More)


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