Transistor operations in 30-nm-gate-length EJ-MOSFETs

  title={Transistor operations in 30-nm-gate-length EJ-MOSFETs},
  author={H. Kawaura and T. Sakamoto and T. Baba and Y. Ochiai and J. Fujita and S. Matsui and J. Sone},
  journal={1997 55th Annual Device Research Conference Digest},
Discusses fabrication of electrically variable shallow junction MOSFETs (EJ-MOSFETs) to investigate transistor characteristics in ultra-fine gate MOSFETs. By using electron beam (EB) lithography and an ultra-high resolution resist (Calixarene), we could achieve a gate length of 30 nm for the first time. Since the short-channel effects are effectively suppressed by electrically induced ultra-shallow source/drain regions in the structure, the fabricated device exhibited normal transistor… Expand
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