Transient Fault Recovery on Chip Multiprocessor based on Dual Core Redundancy and Context Saving

@article{Gong2008TransientFR,
  title={Transient Fault Recovery on Chip Multiprocessor based on Dual Core Redundancy and Context Saving},
  author={Rui Gong and Kui Dai and Zhiying Wang},
  journal={2008 The 9th International Conference for Young Computer Scientists},
  year={2008},
  pages={148-153}
}
To address the increasing susceptibility of microprocessors to transient faults, many techniques have been proposed to exploit core redundancy of chip multiprocessors (CMPs). Chip-level redundant threading (CRT) is a novel approach to detect transient fault on CMPs by executing two copies of a given program on separate cores and comparing the store data. CRTR (CRT with recovery) achieves fault recovery by comparing the result of every instruction before commit. Once detecting a nonidentical… CONTINUE READING

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