Transforming a linear algebra core to an FFT accelerator

  title={Transforming a linear algebra core to an FFT accelerator},
  author={Ardavan Pedram and John D. McCalpin and Andreas Gerstlauer},
  journal={2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors},
This paper considers the modifications required to transform a highly-efficient, specialized linear algebra core into an efficient engine for computing Fast Fourier Transforms (FFTs). We review the minimal changes required to support Radix-4 FFT computations and propose extensions to the micro-architecture of the baseline linear algebra core. Along the way, we study the critical differences between the two classes of algorithms. Special attention is paid to the configuration of the on-chip… CONTINUE READING


Publications citing this paper.
Showing 1-7 of 7 extracted citations


Publications referenced by this paper.
Showing 1-10 of 23 references

A high-performance, low-power linear algebra core

  • A. Pedram
  • ASAP. IEEE, 2011.
  • 2011
Highly Influential
4 Excerpts

Co-design tradeoffs for high-performance, low-power linear algebra architectures

  • A. Pedram
  • IEEE Trans. on Computers, 2012.
  • 2012
2 Excerpts

Computer generation of hardware for linear digital signal processing transforms

  • P. Milder
  • ACM Trans. Des. Autom. Electron. Syst., vol. 17…
  • 2012
2 Excerpts

On the efficiency of register file versus broadcast interconnect for collective communications in data-parallel hardware accelerators

  • A. Pedram
  • SBAC-PAD, 2012.
  • 2012
1 Excerpt

Similar Papers

Loading similar papers…