Trading Accuracy for Power with an Underdesigned Multiplier Architecture

@article{Kulkarni2011TradingAF,
  title={Trading Accuracy for Power with an Underdesigned Multiplier Architecture},
  author={Parag Kulkarni and Puneet Gupta and Milos D. Ercegovac},
  journal={2011 24th Internatioal Conference on VLSI Design},
  year={2011},
  pages={346-351}
}
We propose a novel multiplier architecture with tunable error characteristics, that leverages a modified inaccurate 2x2 building block. Our inaccurate multipliers achieve an average power saving of 31.78% ? 45.4% over corresponding accurate multiplier designs, for an average error of 1.39%?3.32%. Using image filtering and JPEG compression as sample applications we show that our architecture can achieve 2X - 8X better Signal-Noise-Ratio (SNR) for the same power savings when compared to recent… CONTINUE READING
Highly Influential
This paper has highly influenced 29 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 246 citations. REVIEW CITATIONS

From This Paper

Topics from this paper.

Citations

Publications citing this paper.
Showing 1-10 of 178 extracted citations

247 Citations

0204060'12'14'16'18
Citations per Year
Semantic Scholar estimates that this publication has 247 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.
Showing 1-10 of 16 references

Estimating adders for a low density parity check decoder

  • B. J. Phillips, D. R. Kelly, B. W. Ng
  • F. T. Luk, Ed., vol. 6313, no. 1. SPIE, 2006, p…
  • 2006
1 Excerpt

Similar Papers

Loading similar papers…