Towards Automating Simulation-Based Design Verification Using ILP

@inproceedings{Eder2006TowardsAS,
  title={Towards Automating Simulation-Based Design Verification Using ILP},
  author={Kerstin Eder and Peter A. Flach and Hsiou-Wen Hsueh},
  booktitle={ILP},
  year={2006}
}
Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new CoverageDirected test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct… CONTINUE READING