Topography simulation for the virtual wafer fab

@inproceedings{Cale2000TopographySF,
  title={Topography simulation for the virtual wafer fab},
  author={Timothy S. Cale and Tushar P. Merchant and Leonard Borucki and Andrew H. Labun},
  year={2000}
}
Abstract We introduce modeling and simulation of topography evolution during processes used in the fabrication of integrated circuits. After an overview, the presentation is divided into three major sections. In the first section, we consider thermal processes. The first process considered in this section is the chemical vapor deposition (CVD) of SiO 2 from TEOS (tetraethoxysilane). We discuss the use of film profile information to help decide between, and to help refine, kinetic models. The… CONTINUE READING

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