# A Generic Building Block For Hopfield Neural Networks With On-chip Learning

@article{Gschwind1996AGB, title={A Generic Building Block For Hopfield Neural Networks With On-chip Learning}, author={Michael K. Gschwind and Valentina Salapura and Oliver Maischberger}, journal={1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96}, year={1996}, volume={Supplement}, pages={49-52} }

We present an extendable digital architecture for the implementation of a Hofield neural network using fieldprogrammable gate arrays (FPGAs). Due to its bit-serialk implementation, the actual digital circuitry is simple and highly regular, thus allowing efficient space usage of FPGAS. We exploit the reprogrammability of these devices to support on-chip learning.

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