Three dimensional metallization for vertically integrated circuits

  title={Three dimensional metallization for vertically integrated circuits},
  author={D. Bollmann and R. Braun and R. Buchner and U. Cao-Minh and M. Engelhardt and G. Errmann and T. Grassl and K. Hieber and H. Hubner and G. Kawala and M. Kleiner and A. Klumpp and S. Kuhn and C. Landesberger and H. Lezec and W. Muth and W. Pamler and R. Popp and E. Renner and G. Ruhl and A. Sanger and U. Scheler and C. Schmidt and S. Schwarzl and J. Weber and W. Weber and P. Ramm},
  journal={European Workshop Materials for Advanced Metallization,},
  • D. Bollmann, R. Braun, +24 authors P. Ramm
  • Published 1997
  • Materials Science
  • European Workshop Materials for Advanced Metallization,
  • The mainstream planar technology is marked by physical and technological limitations, which have a severe impact on the system characteristics. The performance, the multifunctionality and the reliability of microelectronic systems will be mainly limited by the wiring between the IC's and subsystems. The "onchip" wiring also leads to a critical performance bottleneck for future IC generations which can be solved only temporarily by the introduction of additional metallization layers and… CONTINUE READING
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