Thermal-aware power network design for IR drop reduction in 3D ICs

@article{Li2012ThermalawarePN,
  title={Thermal-aware power network design for IR drop reduction in 3D ICs},
  author={Zuowei Li and Yuchun Ma and Qiang Zhou and Yici Cai and Yu Wang and Tingting Huang and Yuan Xie},
  journal={17th Asia and South Pacific Design Automation Conference},
  year={2012},
  pages={47-52}
}
Due to the high integration on vertical stacked layers, power/ground network design becomes one of the critical challenges in 3D IC design. With the leakage-thermal dependency, the increasing on-chip temperature in 3D designs has serious impact on IR drop due to the increased wire resistance and increased leakage current. Power/ground (P/G) TSVs can help to relieve the IR drop violation by vertically connecting the on-chip P/G networks on different layers. However, most previous work only… CONTINUE READING
Highly Cited
This paper has 18 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 14 extracted citations

References

Publications referenced by this paper.
Showing 1-10 of 21 references

Similar Papers

Loading similar papers…