Thermal-aware mapping and placement for 3-D NoC designs


Networks on chip (NoC) and 3D integrated circuits have been proposed as solutions to the ever-growing interconnect woes surrounding systems-on-chip. 3D designs however suffer from hotspot creation, due to the increase in the power density of parts of the chip. In this paper, we propose the use of a genetic algorithm for a thermal and communication aware… (More)
DOI: 10.1109/SOCC.2005.1554447


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