Thermal Stress Induced Delamination of Through Silicon Vias in 3-D Interconnects


In this paper we investigated the interfacial delamination of through silicon via (TSV) structures under thermal cycling or processing. First finite element analysis (FEA) was used to evaluate the thermal stresses and the driving force of TSV delamaination. Then, the modeling results were validated by analytical solutions of the crack driving force deduced for a long crack at the steady state. Both results were found to be in good agreement at the steady state and together they suggested a fracture mechanism to account for the TSV delamination observed. The analytical solution further provided a basic framework for studying the impact of materials, process and structural design on reliability of the TSV structure. In particular, we found that reducing the TSV diameter yields a definite advantage in lowering the crack driving force. In addition, annular TSVs and an overlaying metal pad on a TSV can reduce the crack driving force for delamination during thermal cycling. Finally, the metallization effect was investigated for four TSV materials: copper, aluminum, nickel, and tungsten. Tungsten was found to have the smallest crack driving force due to the least thermal mismatch with the surrounding silicon. The reliability implication was discussed. Introduction The incorporation of TSVs poses a significant challenge to thermo-mechanical reliability of the 3-D interconnects. In particular, the mismatch in coefficients of thermal expansion (CTEs) between the conducting metal in TSV and the silicon matrix can generate thermal stresses inside and around TSVs [1-3]. Such stresses can be sufficient to degrade the performance of stress-sensitive devices [4], to induce cohesive cracking in the silicon [3], and to drive interfacial delamination between the TSV and the silicon matrix [5]. In fact, thermal stress-induced TSV delamination has been found to be one of the dominant failure modes for 3-D interconnects. During fabrication of 3-D interconnects, TSVs can “pop-up” from the silicon wafer and damage the Back-End-Of-Line (BEOL) structures. Finite element analysis (FEA) has been applied to simulate the driving force of TSV delamination [5]. In general, the crack driving force was found to increase with the diameter of TSVs and the circumferential crack length. In this paper, the driving force and the delamination mechanism for TSV structures were further investigated. The paper is organized in three parts. First, for better understanding of the underlying mechanism, the energy release rate (ERR) that drives the TSV delamination was evaluated using analytical solutions deduced for simplified TSV structures. The results were supplemented and compared with finite element calculations. This was followed by a study on the impact of materials, process and structural design on the reliability of the TSV structure. The effect of TSV geometry was first studied for three types of TSV structures: (a) full copper filling, (b) annular copper filling, and (c) full copper filling with an annular polymer liner between the copper and the silicon matrix. Here a previous study on thermal stress behavior [3] was extended to calculate the driving force for interfacial delamination. In addition, we investigated the effect of depositing a metal pad on top of the TSV on interfacial delamination. Finally, in the last part, the metallization effect was examined for four TSV materials: copper, aluminum, nickel, and tungsten. The implication on the thermo-mechnical reliability of TSVs will be discussed. Crack Driving Force for TSV Delamination: Steady-state Solutions Thermal stresses can develop around TSVs during fabrication arising from the thermal expansion mismatch between constituent materials. Figure 1 shows the thermal stress inside a copper TSV structure under thermal cycling from FEA simulations, consisting of both shear and normal stresses. Consider first the effect from the shear stresses. The FEA results reveal a shear stress concentration around the TSV boundary near the wafer surface where the shear stresses have opposite signs depending on whether a heating or a cooling thermal load. The different signs of the shear stress will drive the copper TSV to “pop up” or to cave in from the wafer surface. In both cases, the stress drives a shear-induced delamination along the TSV/silicon interface with the same magnitude of ERR. In contrast, the different signs of the normal stresses induce distinct effects on interfacial delamination. Only the tensile normal stress under a negative thermal load can drive the TSV delamination while the compressive stress under a positive thermal load will not contribute to the TSV delamination. The stress combination will result in delamination under a positive thermal load driven mainly by the shear stress near the wafer surface, i.e. a Mode II fracture. On the other hand, the delamination under a negative thermal load is driven by both the shear stress and the radial tensile stress, i.e. a mix-mode fracture, and the driving force is generally higher. The difference between two opposite thermal loads is further illustrated in Figure 2. Figure 1. Thermal stress distribution around the TSV boundary near the wafer surface. Cu TSV cross-section Shear stress xy y

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@inproceedings{Lu2010ThermalSI, title={Thermal Stress Induced Delamination of Through Silicon Vias in 3-D Interconnects}, author={Kuan H. Lu and Xuefeng Zhang and Jay Im and Rui Huang}, year={2010} }