Thermal Aware Placement in 3D ICs

  title={Thermal Aware Placement in 3D ICs},
  author={Prasun Ghosal and Hafizur Rahaman and Parthasarathi Dasgupta},
  journal={2010 International Conference on Advances in Recent Technologies in Communication and Computing},
Dominance of on-chip power densities has become a critical design constraint in high-performance VLSI design. This is primarily due to increased technology scaling, number of components, frequency and bandwidth. The consumed power is usually converted into dissipated heat, affecting the performance and reliability of a chip. Moreover, recent trends in VLSI design entail the stacking of multiple active (device) layers into a monolithic chip. These 3D chips have significantly larger power… CONTINUE READING
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