TheoSim: combining symbolic simulation and theorem proving for hardware verification

@article{Sammane2004TheoSimCS,
  title={TheoSim: combining symbolic simulation and theorem proving for hardware verification},
  author={Ghiath Al Sammane and Julien Schmaltz and Diana Toma and Pierre Ostier and Dominique Borrione},
  journal={Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)},
  year={2004},
  pages={60-65}
}
TheoSim is a symbolic verifiation tool that fills the gap between the simulation of test cases, and the use of theorem provers, for the validation of initial specifications, and the exploration of the very first design steps of digital integrated systems. The principles of Theosim are presented, followed by its application to the verification of the first design step of a state-of-the-art network on chip architecture.