The new memory-efficient hardware architecture of CAVLD in H.264/AVC for mobile system

@article{Park2009TheNM,
  title={The new memory-efficient hardware architecture of CAVLD in H.264/AVC for mobile system},
  author={Sangyoon Park and Kyeongyuk Min and Jong-Wha Chong},
  journal={2009 9th International Symposium on Communications and Information Technology},
  year={2009},
  pages={204-207}
}
In this paper, we propose a new Context-based Adaptive Variable Decoding (CAVLD) hardware architecture without memory fabrication for mobile process. Previous CAVLD hardware architecture consists of five step blocks and each block gets several bits from controller and Look-Up Tables (LUTs). Many researches on LUTs basically require Read Only Memory (ROM) or Random Access Memory (RAM) fabrication process which is difficult to be implemented in general mobile digital logic fabrication process. In… CONTINUE READING

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