The modified P+ electrode layout schemes to enhance esd robustness of SCR structure for PMIC applications

@article{Chen2011TheMP,
  title={The modified P+ electrode layout schemes to enhance esd robustness of SCR structure for PMIC applications},
  author={Lu-An Chen and Chang-Tzu Wang and Tai-Hsiang Lai and Tien-Hao Tang and Kuan-Cheng Su},
  journal={2011 International Reliability Physics Symposium},
  year={2011},
  pages={EL.1.1-EL.1.3}
}
In this work, the MPSCR structure have been verified in a 0.35-um 40-V CDMOS technology. The MPSCR structure with high ESD robustness has been clearly investigated by TLP instrument and TCAD simulator. By the simulation results, the modified P+ electrode layout of cathode side can enhance the turn-on efficiency of embedded SCR path, and avoid the current… CONTINUE READING