The impact of through silicon via proximity on CMOS device

  title={The impact of through silicon via proximity on CMOS device},
  author={Hsiu Jao and Y. Y. Lin and Will Liao and Billy Wu and Brady Huang and Lawrence Huang and Joe Huang and Steven Shih and J. P. Lin and P. S. Huang and M. Y. Tsai and C. Y. D. Huang},
  journal={2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)},
As device scaling becomes increasingly difficult, 3D integration with through silicon via (TSV) has emerged as a viable solution for addressing the requisite bandwidth and power efficiency challenges. However, mechanical stresses induced by the TSVs must be controlled in the 3D flow in order to preserve the electrical integrity of front-end devices. Since copper filling material of the TSV could causes stresses on silicon near the TSV, the impact of TSV proximity on CMOS must be evaluated at… CONTINUE READING
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