The future of microprocessors

@article{Borkar2011TheFO,
  title={The future of microprocessors},
  author={S. Borkar and A. Chien},
  journal={Communications of the ACM},
  year={2011},
  volume={54},
  pages={67 - 77}
}
Energy efficiency is the new fundamental limiter of processor performance, way beyond numbers of processors. 

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References

SHOWING 1-10 OF 64 REFERENCES
The Case for Energy-Proportional Computing
TLDR
Energy-proportional designs would enable large energy savings in servers, potentially doubling their efficiency in real-life use, particularly the memory and disk subsystems. Expand
C.mmp: a multi-mini-processor
TLDR
An overview of the goals, design, and status of this hardware/software complex, and some of the research problems raised and analytic problems solved in the course of its construction are described. Expand
Parameter variations and impact on circuits and microarchitecture
TLDR
Process, voltage and temperature variations; and their impact on circuit and microarchitecture; and possible solutions to reduce the impact of parameter variations and to achieve higher frequency bins are presented. Expand
TILE64 - Processor: A 64-Core SoC with Mesh Interconnect
The TILE64TM processor is a multicore SoC targeting the high-performance demands of a wide range of embedded applications across networking and digital multimedia applications. A figure shows a blockExpand
Multiprocessor hardware: An architectural overview
TLDR
The motivation for multiprocessor system research and development activity arises from a consideration of one or more of the following factors: throughput, flexibility, extendability, price/performance, availability, reliability, fault tolerance. Expand
The history of the microcomputer-invention and evolution
TLDR
Two "microcomputers" 10 years ahead of "schedule" are developed by scaling down the requirements and using a few other "tricks" described in this paper. Expand
A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS
TLDR
This programmable engine is designed to offload TCP inbound processing at wire speed for 10-Gb/s Ethernet, supporting 64-byte minimum packet size and includes hardware support for dynamically reordering out-of-order packets. Expand
Baring It All to Software: Raw Machines
TLDR
The most radical of the architectures that appear in this issue are Raw processors-highly parallel architectures with hundreds of very simple processors coupled to a small portion of the on-chip memory, allowing synthesis of complex operations directly in configured hardware. Expand
Ubiquitous Parallel Computing from Berkeley, Illinois, and Stanford
The ParLab at Berkeley, UPCRC-Illinois, and the Pervasive Parallel Laboratory at Stanford are studying how to make parallel programming succeed given industry's recent shift to multicore computing.Expand
Transient behavior of cache memories
TLDR
In this paper a mathematical model is developed which predicts the effect on the miss ratio of running a program in a sequence of interrupted execution intervals and results are compared to measured miss ratios of real programs executing in an interrupted execution environment. Expand
...
1
2
3
4
5
...