• DOI:10.1109/ASYNC.2007.28
• Corpus ID: 33189213

The Vortex: A Superscalar Asynchronous Processor

@article{Lines2007TheVA,
  title={The Vortex: A Superscalar Asynchronous Processor},
  author={Andrew Lines},
  journal={13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)},
  year={2007},
  pages={39-48}
}

• Andrew Lines
• Published 12 March 2007
• Computer Science, Physics
• 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)

The "Vortex" processor is a general purpose CPU with a novel architecture and instruction set. The primary feature of the Vortex architecture is many parallel function units which communicate through a central crossbar, instead of a traditional register file. Instructions are fetched in parallel by cache lines, as in a VLIW processor, but any data or structural dependencies are resolved deterministically by the hardware, as in a superscalar processor. The prototype Vortex CPU supports a 32-bit integer datapath and executes up to 9 instructions per cycle. It uses the "integrated pipelining" asynchronous design style, was fabricated in 2001 in TSMC's 0.15 mum G process, and runs at a typical frequency of 475MHz. Although the Vortex CPU itself has not been commercialized, many of its component circuits have been used in the products of Fulcrum Microsystems.