The V-Way cache: demand-based associativity via global replacement


As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of current set-associative caches is reduced because programs exhibit a non-uniform distribution of memory accesses across different cache sets. We propose a technique to vary the… (More)
DOI: 10.1109/ISCA.2005.52
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@article{Qureshi2005TheVC, title={The V-Way cache: demand-based associativity via global replacement}, author={Moinuddin K. Qureshi and David Thompson and Yale N. Patt}, journal={32nd International Symposium on Computer Architecture (ISCA'05)}, year={2005}, pages={544-555} }