The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays

@inproceedings{Wilton2004TheIO,
  title={The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays},
  author={Steven J. E. Wilton and Su-Shin Ang and Wayne Luk},
  booktitle={FPL},
  year={2004}
}
This paper investigates experimentally the quantitative impact of pipelining on energy per operation for two representative FPGA devices: a 0.13μm CMOS high density/high speed FPGA (Altera Stratix EP1S40), and a 0.18μm CMOS low-cost FPGA (Xilinx XC2S200). The results are obtained by both measurements and execution of vendor-supplied tools for power estimation. It is found that pipelining can reduce the amount of energy per operation by between 40% and 90%. Further reduction in energy… CONTINUE READING
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