The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing

@article{Murakawa1999TheGC,
  title={The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing},
  author={Masahiro Murakawa and Shuji Yoshizawa and Isamu Kajitani and Xin Yao and Nobuki Kajihara and Masaya Iwata and Tetsuya Higuchi},
  journal={IEEE Trans. Computers},
  year={1999},
  volume={48},
  pages={628-639}
}
This paper describes the GRD (Genetic Reconfiguration of DSPs) chip, which is evolvable hardware designed for neural network applications. The GRD chip is a building block for the configuration of a scalable neural network hardware system. Both the topology and the hidden layer node functions of a neural network mapped on the GRD chips are dynamically reconfigured using a genetic algorithm (GA). Thus, the most desirable network topology and choice of node functions (e.g., Gaussian or sigmoid… CONTINUE READING

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