FPGA in the Software Radio
- Mark Cummings, Shinichiro Haruyama
- IEEE Communications Magazine,
In this paper we propose a system based on a Complex Programmable Logic Device (CPLD) as a physical modeling synthesis engine and a hardware description language (VHDL) to implement the physical modeling synthesis algorithms. An evaluation of VHDL and CPLD technologies for this application was performed. As an example we have programmed the Karplus-Strong plucked string algorithm using VHDL on an Altera CPLD.