The Chess Monster Hydra

@inproceedings{Donninger2004TheCM,
  title={The Chess Monster Hydra},
  author={Chrilly Donninger and Ulf Lorenz},
  booktitle={FPL},
  year={2004}
}
With the help of the FPGA technology, the boarder between hard- and software has vanished. It is now possible to develop complex designs and fine grained parallel applications without the long-lasting chip design cycles. Additionally, it has become easier to write coarse grained parallel applications with the help of message passing libraries like MPI. The chess program Hydra is a high level hardware-software co-design application which profits from both worlds. We describe the design… 

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References

SHOWING 1-10 OF 10 REFERENCES

Chess 4.5-The Northwestern University chess program

This chapter will describe the structure of the CHESS 4.5 program, focusing on the practical considerations that motivated the implementation of its various features.

Studying overheads in massively parallel MIN/MAX-tree evaluation

A combination of local, medium range, and global load distribution strategies that does not only show a good behavior in terms of work load, but also has a positive influence on the search overhead, especially using interconnection networks with logarithmic diameter.

IBM's Deep Blue Chess grandmaster chips

The design philosophy, general architecture, and performance of the chess chips, which provided most of Deep Blue's computational power, are described.

BELLE: chess hardware

The computer chess program BELLE is currently the World Computer Chess Champion and the North American Computer Chess Champions and the special-purpose hardware that gives it its advantage: speed.

An Analysis of Alpha-Beta Pruning

Spielbaum-Suchverfahren

Belle chess hardware Advances in Computer Chess

  • Belle chess hardware Advances in Computer Chess
  • 1982

Belle chess hardware. Advances in Computer Chess III, M.R.B

  • 1982

Computers, Chess, and Cognition, chapter 5 Deep Thought

  • Computers, Chess, and Cognition, chapter 5 Deep Thought
  • 1990

Computers, Chess, and Cognition, chapter 5 Deep Thought, pages 55–78

  • 1990